STM32 registers and predefined memory mapped IO addresses

I'm just beginning to understand the way the various STM headers files define the types and so on that are associated with the various memory mapped registers.

Something occurred to me as I was perusing this and that is that the entire set of memory mapped registers could be represented with one large, comprehensive typedef, with a pointer to that typedef initialized to the relevant base address. In fact we could define three "parent" typedefs one for AHB1, APB1 and APB2.

Each of these...

STM32 registers and predefined memory mapped IO addresses