I had a requirement to do some filter testing and needed to generate a test
bench with some flexibility.
For this discussion a “component” is an onchip resource.
Below two DDS components generating two tones. Each tones length in # cycles is
controlled by the burst counter. It counts the cycle finished signal coming out of
each wavedac. I choose to have both bursts equal length, could have added another
burst counter so that individual bursts could be controlled. Tones of course...
Tone Burst Test Bed
bench with some flexibility.
For this discussion a “component” is an onchip resource.
Below two DDS components generating two tones. Each tones length in # cycles is
controlled by the burst counter. It counts the cycle finished signal coming out of
each wavedac. I choose to have both bursts equal length, could have added another
burst counter so that individual bursts could be controlled. Tones of course...
Tone Burst Test Bed